In a staggered pin grid array, pins on a circuit are set in a diagonal pattern.
Throughout the history of the integrated circuit, the arrangement of the metal connector pins has changed. As the need for larger and faster data transfers has increased, the pin grid array has evolved to meet this need.
Description
The staggered pin grid array (SPGA) is an arrangement of pins on an integrated circuit in which the pins are placed in diagonal rows. The pattern is also described as intersecting squares.
Benefits
The benefit of using a staggered pin grid array, versus the previous standard of aligned rows and columns, is that the SPGA positioning allows for closer pins, and thus more pins over a given surface area. This can decrease the size of a microchip or provide larger transfer capacity in a similar-size chip.
History
In early integrated circuits, pins were arranged using the pin grid array (PGA) that set pins in a gridlike formation. As processors advanced and required more pins, the PGA was no longer appropriate. The staggered pin grid array was created to decrease the microprocessor size when a large number of pins is required. Processors based on Socket 5, Socket 7 and Socket 8 technology commonly use this formation.
Tags: grid array, staggered grid array, staggered grid, integrated circuit, more pins, Socket Socket